Main Page
Design Units
Files
Design Unit List
Design Unit Hierarchy
Design Unit Members
mrisc Member List
This is the complete list of members for
mrisc
, including all inherited members.
s1
alu
[Ports]
mux2_8.in1
mux2_8
[Inputs]
alu.in1
mux2_8
[Inputs]
mux2_8.out
mux2_8
[Outputs]
alu.out
mux2_8
[Outputs]
s2
alu
[Inputs]
mask
alu
[Inputs]
sel
mux2_11
[Ports]
in0
mux2_11
[Ports]
in1
mux2_11
[Ports]
out
mux2_11
[Ports]
sel
mux2_11
[Inputs]
in0
mux2_11
[Inputs]
in1
mux2_11
[Inputs]
out
alu
[Outputs]
out
mux2_11
[Outputs]
op
alu
[Inputs]
in
inc11
[Ports]
out
inc11
[Ports]
in
inc11
[Inputs]
out
inc11
[Outputs]
in
inc8
[Ports]
out
inc8
[Ports]
in
inc8
[Inputs]
out
inc8
[Outputs]
clk
sfifo4x11
[Ports]
c_in
alu
[Inputs]
push
sfifo4x11
[Ports]
din
sfifo4x11
[Ports]
pop
sfifo4x11
[Ports]
dout
sfifo4x11
[Ports]
clk
sfifo4x11
[Inputs]
push
sfifo4x11
[Inputs]
din
sfifo4x11
[Inputs]
pop
sfifo4x11
[Inputs]
dout
sfifo4x11
[Outputs]
stack1
sfifo4x11
[Registers]
c
alu
[Outputs]
stack2
sfifo4x11
[Registers]
stack3
sfifo4x11
[Registers]
stack4
sfifo4x11
[Registers]
dc
alu
[Outputs]
z
alu
[Outputs]
sel
mux2_7
[Ports]
in0
mux2_7
[Ports]
in1
mux2_7
[Ports]
out
mux2_7
[Ports]
sel
mux2_7
[Inputs]
in0
mux2_7
[Inputs]
in1
mux2_7
[Inputs]
out
mux2_7
[Outputs]
sel
mux8_1
[Ports]
Karsl
alu
[Parameters]
in
mux8_1
[Ports]
out
mux8_1
[Ports]
sel
mux8_1
[Inputs]
in
mux8_1
[Inputs]
out
mux8_1
[Outputs]
mux2_8.sel
mux2_8
[Ports]
alu.sel
mux2_8
[Ports]
mux2_8.in0
mux2_8
[Ports]
alu.in0
mux2_8
[Ports]
mux2_8.in1
mux2_8
[Ports]
alu.in1
mux2_8
[Ports]
mux2_8.out
mux2_8
[Ports]
alu.out
mux2_8
[Ports]
mux2_8.sel
mux2_8
[Inputs]
alu.sel
mux2_8
[Inputs]
ALU_ADD
alu
[Parameters]
s2
alu
[Ports]
mux2_8.in0
mux2_8
[Inputs]
alu.in0
mux2_8
[Inputs]
mux2_8.in1
mux2_8
[Inputs]
alu.in1
mux2_8
[Inputs]
mux2_8.out
mux2_8
[Outputs]
alu.out
mux2_8
[Outputs]
ALU_SUB
alu
[Parameters]
ALU_INC
alu
[Parameters]
sel
mux2_11
[Ports]
in0
mux2_11
[Ports]
in1
mux2_11
[Ports]
out
mux2_11
[Ports]
sel
mux2_11
[Inputs]
in0
mux2_11
[Inputs]
in1
mux2_11
[Inputs]
ALU_DEC
alu
[Parameters]
out
mux2_11
[Outputs]
ALU_AND
alu
[Parameters]
in
inc11
[Ports]
out
inc11
[Ports]
in
inc11
[Inputs]
out
inc11
[Outputs]
in
inc8
[Ports]
out
inc8
[Ports]
in
inc8
[Inputs]
out
inc8
[Outputs]
clk
sfifo4x11
[Ports]
ALU_CLR
alu
[Parameters]
push
sfifo4x11
[Ports]
din
sfifo4x11
[Ports]
pop
sfifo4x11
[Ports]
dout
sfifo4x11
[Ports]
clk
sfifo4x11
[Inputs]
push
sfifo4x11
[Inputs]
din
sfifo4x11
[Inputs]
pop
sfifo4x11
[Inputs]
dout
sfifo4x11
[Outputs]
stack1
sfifo4x11
[Registers]
ALU_NOT
alu
[Parameters]
stack2
sfifo4x11
[Registers]
stack3
sfifo4x11
[Registers]
stack4
sfifo4x11
[Registers]
ALU_IOR
alu
[Parameters]
clk
register_file
[Ports]
rst
register_file
[Ports]
rf_rd_bnk
register_file
[Ports]
ALU_MOV
alu
[Parameters]
rf_rd_addr
register_file
[Ports]
rf_rd_data
register_file
[Ports]
rf_we
register_file
[Ports]
rf_wr_bnk
register_file
[Ports]
rf_wr_addr
register_file
[Ports]
rf_wr_data
register_file
[Ports]
clk
register_file
[Inputs]
rst
register_file
[Inputs]
rf_rd_bnk
register_file
[Inputs]
rf_rd_addr
register_file
[Inputs]
ALU_MOVW
alu
[Parameters]
rf_rd_data
register_file
[Outputs]
rf_we
register_file
[Inputs]
rf_wr_bnk
register_file
[Inputs]
rf_wr_addr
register_file
[Inputs]
rf_wr_data
register_file
[Inputs]
wr_data_tmp
register_file
[Registers]
rd_wr_addr_equal
register_file
[Registers]
clk
mrisc
[Ports]
rst_in
mrisc
[Ports]
inst_addr
mrisc
[Ports]
ALU_RLF
alu
[Parameters]
mask
alu
[Ports]
inst_data
mrisc
[Ports]
portain
mrisc
[Ports]
portbin
mrisc
[Ports]
portcin
mrisc
[Ports]
portaout
mrisc
[Ports]
portbout
mrisc
[Ports]
portcout
mrisc
[Ports]
trisa
mrisc
[Ports]
trisb
mrisc
[Ports]
trisc
mrisc
[Ports]
ALU_RRF
alu
[Parameters]
tcki
mrisc
[Ports]
wdt_en
mrisc
[Ports]
clk
mrisc
[Inputs]
rst_in
mrisc
[Inputs]
inst_addr
mrisc
[Outputs]
inst_data
mrisc
[Inputs]
portain
mrisc
[Inputs]
portbin
mrisc
[Inputs]
portcin
mrisc
[Inputs]
portaout
mrisc
[Outputs]
ALU_SWP
alu
[Parameters]
portbout
mrisc
[Outputs]
portcout
mrisc
[Outputs]
trisa
mrisc
[Outputs]
trisb
mrisc
[Outputs]
trisc
mrisc
[Outputs]
tcki
mrisc
[Inputs]
wdt_en
mrisc
[Inputs]
PC_RST_VECTOR
mrisc
[Parameters]
STAT_RST_VALUE
mrisc
[Parameters]
OPT_RST_VALUE
mrisc
[Parameters]
ALU_XOR
alu
[Parameters]
FSR_RST_VALUE
mrisc
[Parameters]
TRIS_RST_VALUE
mrisc
[Parameters]
ALU_ADD
mrisc
[Parameters]
ALU_SUB
mrisc
[Parameters]
ALU_INC
mrisc
[Parameters]
ALU_DEC
mrisc
[Parameters]
ALU_AND
mrisc
[Parameters]
ALU_CLR
mrisc
[Parameters]
ALU_NOT
mrisc
[Parameters]
ALU_IOR
mrisc
[Parameters]
ALU_BCF
alu
[Parameters]
ALU_MOV
mrisc
[Parameters]
ALU_MOVW
mrisc
[Parameters]
ALU_RLF
mrisc
[Parameters]
ALU_RRF
mrisc
[Parameters]
ALU_SWP
mrisc
[Parameters]
ALU_XOR
mrisc
[Parameters]
ALU_BCF
mrisc
[Parameters]
ALU_BSF
mrisc
[Parameters]
I_ADDWF
mrisc
[Parameters]
I_ANDWF
mrisc
[Parameters]
ALU_BSF
alu
[Parameters]
I_CLRF
mrisc
[Parameters]
I_CLRW
mrisc
[Parameters]
I_COMF
mrisc
[Parameters]
I_DEC
mrisc
[Parameters]
I_DECFSZ
mrisc
[Parameters]
I_INCF
mrisc
[Parameters]
I_INCFSZ
mrisc
[Parameters]
I_IORWF
mrisc
[Parameters]
I_MOV
mrisc
[Parameters]
I_MOVWF
mrisc
[Parameters]
clk
presclr_wdt
[Ports]
I_NOP
mrisc
[Parameters]
I_RLF
mrisc
[Parameters]
I_RRF
mrisc
[Parameters]
I_SUBWF
mrisc
[Parameters]
I_SWAPF
mrisc
[Parameters]
I_XORWF
mrisc
[Parameters]
I_BCF
mrisc
[Parameters]
I_BSF
mrisc
[Parameters]
I_BTFSC
mrisc
[Parameters]
I_BTFSS
mrisc
[Parameters]
rst
presclr_wdt
[Ports]
I_ANDLW
mrisc
[Parameters]
I_CALL
mrisc
[Parameters]
I_CLRWDT
mrisc
[Parameters]
I_GOTO
mrisc
[Parameters]
I_IORLW
mrisc
[Parameters]
I_MOVLW
mrisc
[Parameters]
I_OPTION
mrisc
[Parameters]
I_RETLW
mrisc
[Parameters]
I_SLEEP
mrisc
[Parameters]
I_TRIS
mrisc
[Parameters]
tcki
presclr_wdt
[Ports]
I_XORLW
mrisc
[Parameters]
INDF_ADDR
mrisc
[Parameters]
TMR0_ADDR
mrisc
[Parameters]
PCL_ADDR
mrisc
[Parameters]
STAT_ADDR
mrisc
[Parameters]
FSR_ADDR
mrisc
[Parameters]
PORTA_ADDR
mrisc
[Parameters]
PORTB_ADDR
mrisc
[Parameters]
PORTC_ADDR
mrisc
[Parameters]
K_SEL
mrisc
[Parameters]
option
presclr_wdt
[Ports]
SFR_SEL
mrisc
[Parameters]
RF_SEL
mrisc
[Parameters]
STAT_WR_C
mrisc
[Parameters]
STAT_WR_DC
mrisc
[Parameters]
STAT_WR_Z
mrisc
[Parameters]
rst
mrisc
[Registers]
instr_0
mrisc
[Registers]
instr_1
mrisc
[Registers]
rst_r1
mrisc
[Registers]
rst_r2
mrisc
[Registers]
tmr0_we
presclr_wdt
[Ports]
out
alu
[Ports]
valid_1
mrisc
[Registers]
mask
mrisc
[Registers]
sfr_rd_data
mrisc
[Registers]
alu_op
mrisc
[Registers]
src1_sel
mrisc
[Registers]
src1_sel_
mrisc
[Registers]
stat_bwe
mrisc
[Registers]
pc_skz
mrisc
[Registers]
pc_skz_
mrisc
[Registers]
pc_bset
mrisc
[Registers]
tmr0_cnt_en
presclr_wdt
[Ports]
pc_bset_
mrisc
[Registers]
pc_bclr
mrisc
[Registers]
pc_bclr_
mrisc
[Registers]
pc_call
mrisc
[Registers]
pc_call_
mrisc
[Registers]
pc_goto
mrisc
[Registers]
pc_goto_
mrisc
[Registers]
pc_retlw
mrisc
[Registers]
pc_retlw_
mrisc
[Registers]
invalidate_0
mrisc
[Registers]
wdt_en
presclr_wdt
[Ports]
w_we_
mrisc
[Registers]
rf_we_
mrisc
[Registers]
sfr_we_
mrisc
[Registers]
tris_we_
mrisc
[Registers]
w_we
mrisc
[Registers]
rf_we1
mrisc
[Registers]
rf_we2
mrisc
[Registers]
rf_we3
mrisc
[Registers]
opt_we
mrisc
[Registers]
trisa_we
mrisc
[Registers]
wdt_clr
presclr_wdt
[Ports]
trisb_we
mrisc
[Registers]
trisc_we
mrisc
[Registers]
tmr0_we
mrisc
[Registers]
pc_we
mrisc
[Registers]
stat_we
mrisc
[Registers]
fsr_we
mrisc
[Registers]
porta_we
mrisc
[Registers]
portb_we
mrisc
[Registers]
portc_we
mrisc
[Registers]
wdt_clr
mrisc
[Registers]
wdt_to
presclr_wdt
[Ports]
inst_addr
mrisc
[Registers]
pc
mrisc
[Registers]
pc_r
mrisc
[Registers]
pc_r2
mrisc
[Registers]
w
mrisc
[Registers]
status
mrisc
[Registers]
fsr
mrisc
[Registers]
tmr0
mrisc
[Registers]
option
mrisc
[Registers]
trisa
mrisc
[Registers]
clk
presclr_wdt
[Inputs]
trisb
mrisc
[Registers]
trisc
mrisc
[Registers]
porta_r
mrisc
[Registers]
portb_r
mrisc
[Registers]
portc_r
mrisc
[Registers]
portaout
mrisc
[Registers]
portbout
mrisc
[Registers]
portcout
mrisc
[Registers]
instd_zero
mrisc
[Registers]
w_we1
mrisc
[Registers]
rst
presclr_wdt
[Inputs]
w_we1_
mrisc
[Registers]
invalidate_1_r1
mrisc
[Registers]
invalidate_1_r2
mrisc
[Registers]
tcki
presclr_wdt
[Inputs]
option
presclr_wdt
[Inputs]
tmr0_we
presclr_wdt
[Inputs]
tmr0_cnt_en
presclr_wdt
[Outputs]
op
alu
[Ports]
wdt_en
presclr_wdt
[Inputs]
wdt_clr
presclr_wdt
[Inputs]
wdt_to
presclr_wdt
[Outputs]
prescaler
presclr_wdt
[Registers]
wdt
presclr_wdt
[Registers]
tmr0_cnt_en
presclr_wdt
[Registers]
tcki_r
presclr_wdt
[Registers]
wdt_to
presclr_wdt
[Registers]
presclr_out
presclr_wdt
[Registers]
presclr_out_r1
presclr_wdt
[Registers]
c_in
alu
[Ports]
presclr_out_next
presclr_wdt
[Registers]
c
alu
[Ports]
dc
alu
[Ports]
sel
mux2_7
[Ports]
in0
mux2_7
[Ports]
in1
mux2_7
[Ports]
out
mux2_7
[Ports]
sel
mux2_7
[Inputs]
in0
mux2_7
[Inputs]
in1
mux2_7
[Inputs]
out
mux2_7
[Outputs]
sel
mux8_1
[Ports]
in
mux8_1
[Ports]
z
alu
[Ports]
out
mux8_1
[Ports]
sel
mux8_1
[Inputs]
in
mux8_1
[Inputs]
out
mux8_1
[Outputs]
mux2_8.sel
mux2_8
[Ports]
alu.sel
mux2_8
[Ports]
mux2_8.in0
mux2_8
[Ports]
alu.in0
mux2_8
[Ports]
mux2_8.in1
mux2_8
[Ports]
alu.in1
mux2_8
[Ports]
mux2_8.out
mux2_8
[Ports]
alu.out
mux2_8
[Ports]
mux2_8.sel
mux2_8
[Inputs]
alu.sel
mux2_8
[Inputs]
mux2_8.in0
mux2_8
[Inputs]
alu.in0
mux2_8
[Inputs]
s1
alu
[Inputs]
ALWAYS_0
clk
presclr_wdt
[Processes]
ALWAYS_1
clk
presclr_wdt
[Processes]
ALWAYS_10
clk
sfifo4x11
[Processes]
ALWAYS_11
clk
sfifo4x11
[Processes]
ALWAYS_12
clk
register_file
[Processes]
ALWAYS_13
clk
register_file
[Processes]
ALWAYS_14
clk
mrisc
[Processes]
ALWAYS_15
clk
mrisc
[Processes]
ALWAYS_16
clk
mrisc
[Processes]
ALWAYS_17
clk
mrisc
[Processes]
ALWAYS_18
clk
mrisc
[Processes]
ALWAYS_19
clk
mrisc
[Processes]
ALWAYS_2
clk
presclr_wdt
[Processes]
ALWAYS_20
clk
mrisc
[Processes]
ALWAYS_21
clk
mrisc
[Processes]
ALWAYS_22
clk
mrisc
[Processes]
ALWAYS_23
clk
mrisc
[Processes]
ALWAYS_24
instr_0
mrisc
[Processes]
ALWAYS_25
clk
mrisc
[Processes]
ALWAYS_26
instr_0
mrisc
[Processes]
ALWAYS_27
instr_0
mrisc
[Processes]
ALWAYS_28
clk
mrisc
[Processes]
ALWAYS_29
clk
mrisc
[Processes]
ALWAYS_3
ps, prescaler
presclr_wdt
[Processes]
ALWAYS_30
clk
mrisc
[Processes]
ALWAYS_31
clk
mrisc
[Processes]
ALWAYS_32
clk
mrisc
[Processes]
ALWAYS_33
clk
mrisc
[Processes]
ALWAYS_34
clk
mrisc
[Processes]
ALWAYS_35
clk
mrisc
[Processes]
ALWAYS_36
clk
mrisc
[Processes]
ALWAYS_37
clk
mrisc
[Processes]
ALWAYS_38
clk
mrisc
[Processes]
ALWAYS_39
instr_0
mrisc
[Processes]
ALWAYS_4
clk
presclr_wdt
[Processes]
ALWAYS_40
clk
mrisc
[Processes]
ALWAYS_41
clk
mrisc
[Processes]
ALWAYS_42
clk
mrisc
[Processes]
ALWAYS_43
clk
mrisc
[Processes]
ALWAYS_44
clk
mrisc
[Processes]
ALWAYS_45
clk
mrisc
[Processes]
ALWAYS_46
clk
mrisc
[Processes]
ALWAYS_47
clk
mrisc
[Processes]
ALWAYS_48
clk
mrisc
[Processes]
ALWAYS_49
clk
mrisc
[Processes]
ALWAYS_5
clk
presclr_wdt
[Processes]
ALWAYS_50
clk
mrisc
[Processes]
ALWAYS_51
clk
mrisc
[Processes]
ALWAYS_52
clk
mrisc
[Processes]
ALWAYS_53
clk
mrisc
[Processes]
ALWAYS_54
clk
mrisc
[Processes]
ALWAYS_55
clk
mrisc
[Processes]
ALWAYS_56
clk
mrisc
[Processes]
ALWAYS_57
clk
mrisc
[Processes]
ALWAYS_58
clk
mrisc
[Processes]
ALWAYS_6
clk
presclr_wdt
[Processes]
ALWAYS_7
clk
presclr_wdt
[Processes]
mux2_8.C_ADDSUB_V1_0
mux2_8
[Includes]
alu.mux4_8.C_ADDSUB_V1_0
mux4_8
[Includes]
alu.mux2_8.C_ADDSUB_V1_0
mux2_8
[Includes]
alu.add_sub8_co.C_ADDSUB_V1_0
add_sub8_co
[Includes]
mux2_7.C_ADDSUB_V1_0
mux2_7
[Includes]
inc8.C_ADDSUB_V1_0
inc8
[Includes]
mux2_11.C_ADDSUB_V1_0
mux2_11
[Includes]
inc11.C_ADDSUB_V1_0
inc11
[Includes]
mux8_1.C_ADDSUB_V1_0
mux8_1
[Includes]
sfifo4x11.C_ADDSUB_V1_0
sfifo4x11
[Includes]
mux2_8.C_COMPARE_V1_0
mux2_8
[Includes]
alu.mux4_8.C_COMPARE_V1_0
mux4_8
[Includes]
alu.mux2_8.C_COMPARE_V1_0
mux2_8
[Includes]
alu.add_sub8_co.C_COMPARE_V1_0
add_sub8_co
[Includes]
mux2_7.C_COMPARE_V1_0
mux2_7
[Includes]
inc8.C_COMPARE_V1_0
inc8
[Includes]
mux2_11.C_COMPARE_V1_0
mux2_11
[Includes]
inc11.C_COMPARE_V1_0
inc11
[Includes]
mux8_1.C_COMPARE_V1_0
mux8_1
[Includes]
sfifo4x11.C_COMPARE_V1_0
sfifo4x11
[Includes]
mux2_8.C_MEM_DP_BLOCK_V1_0
mux2_8
[Includes]
alu.mux4_8.C_MEM_DP_BLOCK_V1_0
mux4_8
[Includes]
alu.mux2_8.C_MEM_DP_BLOCK_V1_0
mux2_8
[Includes]
alu.add_sub8_co.C_MEM_DP_BLOCK_V1_0
add_sub8_co
[Includes]
mux2_7.C_MEM_DP_BLOCK_V1_0
mux2_7
[Includes]
inc8.C_MEM_DP_BLOCK_V1_0
inc8
[Includes]
mux2_11.C_MEM_DP_BLOCK_V1_0
mux2_11
[Includes]
inc11.C_MEM_DP_BLOCK_V1_0
inc11
[Includes]
mux8_1.C_MEM_DP_BLOCK_V1_0
mux8_1
[Includes]
sfifo4x11.C_MEM_DP_BLOCK_V1_0
sfifo4x11
[Includes]
mux2_8.C_MUX_BIT_V1_0
mux2_8
[Includes]
alu.mux4_8.C_MUX_BIT_V1_0
mux4_8
[Includes]
alu.mux2_8.C_MUX_BIT_V1_0
mux2_8
[Includes]
alu.add_sub8_co.C_MUX_BIT_V1_0
add_sub8_co
[Includes]
mux2_7.C_MUX_BIT_V1_0
mux2_7
[Includes]
inc8.C_MUX_BIT_V1_0
inc8
[Includes]
mux2_11.C_MUX_BIT_V1_0
mux2_11
[Includes]
inc11.C_MUX_BIT_V1_0
inc11
[Includes]
mux8_1.C_MUX_BIT_V1_0
mux8_1
[Includes]
sfifo4x11.C_MUX_BIT_V1_0
sfifo4x11
[Includes]
mux2_8.C_MUX_BUS_V1_0
mux2_8
[Includes]
alu.mux4_8.C_MUX_BUS_V1_0
mux4_8
[Includes]
alu.mux2_8.C_MUX_BUS_V1_0
mux2_8
[Includes]
alu.add_sub8_co.C_MUX_BUS_V1_0
add_sub8_co
[Includes]
mux2_7.C_MUX_BUS_V1_0
mux2_7
[Includes]
inc8.C_MUX_BUS_V1_0
inc8
[Includes]
mux2_11.C_MUX_BUS_V1_0
mux2_11
[Includes]
inc11.C_MUX_BUS_V1_0
inc11
[Includes]
mux8_1.C_MUX_BUS_V1_0
mux8_1
[Includes]
sfifo4x11.C_MUX_BUS_V1_0
sfifo4x11
[Includes]
mux2_8.C_REG_FD_V1_0
mux2_8
[Includes]
alu.mux4_8.C_REG_FD_V1_0
mux4_8
[Includes]
alu.mux2_8.C_REG_FD_V1_0
mux2_8
[Includes]
alu.add_sub8_co.C_REG_FD_V1_0
add_sub8_co
[Includes]
mux2_7.C_REG_FD_V1_0
mux2_7
[Includes]
inc8.C_REG_FD_V1_0
inc8
[Includes]
mux2_11.C_REG_FD_V1_0
mux2_11
[Includes]
inc11.C_REG_FD_V1_0
inc11
[Includes]
mux8_1.C_REG_FD_V1_0
mux8_1
[Includes]
sfifo4x11.C_REG_FD_V1_0
sfifo4x11
[Includes]
rf0
register_file
[Components]
u0
mrisc
[Components]
u1
alu
[Components]
u10
mrisc
[Components]
u11
mrisc
[Components]
u12
mrisc
[Components]
u13
mrisc
[Components]
u14
mrisc
[Components]
u2
alu
[Components]
u21
mrisc
[Components]
u22
mrisc
[Components]
u3
mrisc
[Components]
u31
mrisc
[Components]
u4
mrisc
[Components]
u5
mrisc
[Components]
u6
mrisc
[Components]
u7
mrisc
[Components]
u8
mrisc
[Components]
u9
mrisc
[Components]
Generated on Sat Apr 19 14:27:18 2008 by
1.5.4-20071103